SMDP Achievements & IEP

Achievements of SMDP-C2SD project

Under SMDP-C2SD Project, the following ASIC design and IP Cores have been successfully implemented:

S.No.	Objectives	FPGA / ASIC
1	AES-128 bit encryption-decryption IP Core	FPGA (Done)ASIC (in progress)
2	A digitally controlled low dropout Voltage regulator to supply voltage of 1.0-1.2 V	ASIC

IEP Attended during 2015-18

Sr. No.	IEP  Topic	Date	No. of participants attended	Name of the Participants attended
1	“System Level Design on Platform FPGA’s” at IIT Delhi	7-9th Dec,2015	1	Dr. Ashutosh Nandi,Assistant Professor,ECE, NIT Kurukshetra
2	“Analog, Mixed-Signal and RF System Design” at IIT Bombay	11-13th July 2016	1	Dr. R.K. Sharma,Professor,ECE, NIT Kurukshetra
3	2nd ZOPP Workshop of SMDP-C2SD project at  IIT Bombay	October 21-22, 2016	1	Dr. R.K. Sharma,Professor,ECE, NIT Kurukshetra
4	Introduction to Analog and Digital VLSI Design at IIT Guwahati	April , 10th to 14th 2017	1	Mr. Gaurav SainiAssistant ProfessorECE, NIT Kurukshetra

EDA Tools Training Attended during 2015-18

S. No.	Name of the faculty and designation	Area of training	Venue	Duration
1.	Mr. Gaurav SainiAssistant Professor	Modeling, Simulation of Nano-Transistors	IIT Kanpur	13th  to 17th  February 2017
2.	Mr. Gaurav SainiAssistant Professor	Cadence Tool Training Programme	PSG Coimbatore	23rd to 25th  January 2017
3.	Mr. Rahul Shandilya Under SMDP	XILINX EDA Tool Training	Thaper University, Patiala	16th to 24th  January 2017
3.	Mr. Ashish JasujaGuest FacultyUnder SMDP-C2SD	XILINX EDA Tool Training	Thaper University, Patiala	16th to 24th  January 2017
4.	Mr. Jada HarshilResearch AssociateUnder SMDP	Synopsys Tool Training workshop	NIT Jaipur	28th Nov. to 2nd  Dec. 2017