Brief Information
S. No. | Name of scheme and Chief Investigator | Amount sanctioned | Sponsoring Agency | Duration |
1. | SMDP-C2SDProf. R. K. Sharma | 94.09 Lacs | Ministry of Electronics & Information Technology, GOI | 5 years |
- PAPER PUBLISHED IN JOURNAL
Dr. R.K. Sharma
- J. Singh and R. K. Sharma, “Making sleep study instrumentation more unobtrusive,” in IEEE Instrumentation & Measurement Magazine, vol. 21, no. 1, pp. 50-53, February 2018. doi: 10.1109/MIM.2018.8278812
- Vaishali and R. K. Sharma “Delay Line based Phase Frequency Detector” Sensor Letters-American Scientific Publishers, June 2018.
List of Book Chapters:
1. Ria Paul, Rahul Shandilya and R.K. Sharma “Comparative Study and Analysis of Pulse Rate Measurement by Vowel Speech and EVM” accepted in Lecture Notes in Computational Vision and Biomechanics, Springer.
2. Ria Paul, Rahul Shandilya and R. K. Sharma, “Hybrid Design of Real-Time Image Processing Techniques for Multiple Biomedical Applications,” in Ambient Communications and Computer Systems, Springer, 2018, pp. 683-692.
G. PAPER PUBLISHED IN CONFERENCES
Dr. R.K. Sharma
- Jaspal, R.K.Sharma “Resource-Constrained Device for Unobtrusive Estimation of Sleep Stages Using R-R Interval Data presented in in 2018 12th International Symposium on Medical Information and Communication Technology (ISMICT) at University of Technology Sydney, 15 Broadway, Ultimo, NSW 2007 University of Technology Sydney, during 26-28 March 2018
- Ria Paul, Rahul Shandilya and R.K. Sharma “Hybrid Design of Image Processing Techniques for Multiple Biomedical Applications in MATLAB and FPGA” International Conference on Interdisciplinary Research for Sustainable Development (IRSD 2017), held at NITTTR Chandigarh, India, Nov. 2017
- Neha Singhal and Dr. R.K. Sharma, “Design of 4.9 GHz Current starved VCO for PLL and CDR”. In proceedings of 5th International Conference on Signal Processing and Integrated Networks, SPIN-2018 organized by Amity University, Noida, on 22-23 February 2018.
- Kavindra Dwivedi, Dr. R.K. Sharma, Rahul Shandilya “Runtime-Reconfigurable Hybrid Multiplier Design”. In proceedings of International Conference on Electical, Electronics, Computers, Communication, Mechanical and Computing (EECCMC)-2018, organised by Priyadarshini Engineering College, Tamil Nadu, India, during 28th -29th January 2018.
- Heera Vinod, R.K Sharma, “Dysphonic Voice detection using MDVP Parameters”, 2018 IEEE Students’ Conference on Electrical, Electronics and Computer Science.
Dr. Sudhanshu Choudhary
- V Musle and S. Choudhary, “Tuning the optical properties of phosphorene by adsorption of alkali metals and halogens”, Optical and Quantum Electronics 50 (7), 285, 2018
- S Meena and S. Choudhary, “Effects of Functionalization of Carbon Nanotubes on its Spin Transport Properties”, Materials Chemistry and Physics, 2018
- R. Kochar and S. Choudhary, “ MoS2/Phosphorene Heterostructure for Optical Absorption in Visible Region”, IEEE Journal of Quantum Electronics, 2018
- G. Yadav and S. Choudhary, “ Tuning the optical properties of zinc sulfide (ZnS) Nanotube”, IEEE Transactions on Nanotechnology, 2018
- M. Saini and S. Choudhary, “Understanding the Spin Transport in H2O-Adsorbed CNT-Based Magnetic Tunnel Junction”, Journal of Superconductivity and Novel Magnetism, 1-5. 2018
- A. Kumar and S. Choudhary, “Enhanced Magnetoresistance in In-Plane Monolayer MoS2 with CrO2 Electrodes”, Journal of Superconductivity and Novel Magnetism, 1-6, 2018
- M. Singh and S. Choudhary, “Spin Transport Investigations in Bilayer Graphene”, Journal of Superconductivity and Novel Magnetism 31 (1), 75-79, 2018
- S. Meena and S. Choudhary, “Tuning the tunneling magnetoresistance by using fluorinated graphene in graphene based magnetic junctions, “AIP Advances 7 (12), 125008. 2017
- AK Singh, S Choudhary, S Smith, “ Understanding the Effect of Twisting Graphene Sheet on Its Magnetoresistance and Spin Filtration Properties” , Journal of Superconductivity and Novel Magnetism 30 (12), 3497-3501, 2017
- R Mahar, S Choudhary,” Performance evaluation of cross link fully adaptive routing algorithm with cross link architecture for Network on Chip”, Inventive Computing and Informatics (ICICI), International Conference on…, 2017
- J Khichar, S Choudhary, “ Fault aware adaptive routing algorithm for mesh based NoCs”, Inventive Computing and Informatics (ICICI), International Conference on …, 2017
- S. Choudhary, “Spin Transport in H2O Adsorbed SiCNT Based Magnetic Tunnel Junction Using Half Metallic Ferromagnetic Electrodes”, Advanced Science, Engineering and Medicine 9 (11), 943-947, 2017
- S.P. Kumar, P. Sandeep and S. Choudhary, “ Changes in transconductance (gm) and Ion/Ioff with high-K dielectrics in MX2 monolayer 10 nm channel double gate n-MOSFET”, Superlattices and Microstructures 111, 642-648, 2017
- S Meena, S Choudhary, “ Spin transport in carbon nanotubes bundles: An ab-initio study”, Physics Letters A 381 (39), 3431-3439, 2017
- N Patel and S Choudhary, “Current saturation and kink effect in zero bandgap double-gate silicene field effect transistors,” Superlattices and Microstructures 110, 155 161 (Elsevier), 2017
- AK Singh, S Choudhary, “Effect of Twisting and Stretching on Magneto Resistance and Spin Filtration in CNTs,” Magnetochemistry, vol. 3, 2017. doi:10.3390/magnetochemistry3030027, 2017
- G Choudhary, S Choudhary, “First-Principle Study of Effects of Magnesium Oxide Adsorption in SiCNT-Based Magnetic Tunnel Junction”, Journal of Superconductivity and Novel Magnetism 30 (8), 2303-2308, 2017
- S Choudhary, S Harode, C Dhopte, “Understanding the Spin Transport in MgO–HfO2 Bilayer Insulating Barrier Magnetic Tunnel Junction”, Journal of Nanoelectronics and Optoelectronics 12 (7), 661-665, 2017
- R Mahar, S Choudhary, J Khichar, “Design of fully adaptive routing for partially interconnected cross-link mesh topology for Network on Chip”, Intelligent Computing and Control (I2C2), 2017 International Conference on, 1-6, 2017
- J Khichar, S Choudhary, R Mahar,” Fault tolerant dynamic XY-YX routing algorithm for network on-chip architecture”, Intelligent Computing and Control (I2C2), 2017 International Conference on, 1-6, 2017
- S Choudhary, A Chauhan, “First principles study on transport characteristics of SiCNT-based field effect transistor”, International Journal of Electronics Letters 5 (2), 246-254, 2017
- V Kumar, S Choudhary, “Understanding the Spin Transport in MgO Adsorbed Carbon Nanotube Based Magnetic Tunnel Junction”, Advanced Science, Engineering and Medicine 9 (4), 307-310, 2017
- G Saini, S Choudhary, “Improving the subthreshold performance of junctionless transistor using spacer engineering”, Microelectronics Journal 59, 55-58, 2017
- AK Singh, S Choudhary, S Meena,” Study of Effect of Bended Graphene on Its Magnetoresistance and Spin Filtration”, Journal of Superconductivity and Novel Magnetism, 1-6., 2017
- S Meena, S Choudhary, “Enhancing TMR and spin-filtration by using out-of-plane graphene insulating barrier in MTJs”, Physical Chemistry Chemical Physics 19 (27), 17765-17772, 2017
Dr. Gaurav Saini
- Varsha Pathak, Gaurav Saini, “A Graded Channel Dual-Material Gate Junctionless MOSFET for Analog Applications,” Procedia Computer Science, Volume 125, 2018, Pages 825-831, ISSN 1877-0509, https://doi.org/10.1016/j.procs.2017.12.105.
- N. Chahal and G. Saini, “Analog performance investigation of double gate junctionless transistor using spacer layer engineering,” 2017 8th International Conference on Computing, Communication and Networking Technologies (ICCCNT), Delhi, 2017, pp. 1-4.doi: 10.1109/ICCCNT.2017.8204086
- S. Dwivedi and G. Saini, “Effect of random dopant fluctuation in nanoscale junctionless FinFET using low and high-k spacers,” 2017 8th International Conference on Computing, Communication and Networking Technologies (ICCCNT), Delhi, India, 2017, pp. 1-4.
doi:10.1109/ICCCNT.2017.8204094 - S. K. Pandey and G. Saini, “Study of self-heating effects on fully depleted SOI MOSFETs with BOX layer engineering,” 2017 International Conference on Trends in Electronics and Informatics (ICEI), Tirunelveli, 2017, pp. 962-965.
doi: 10.1109/ICOEI.2017.8300850 - N. Gehlawat and G. Saini, “Random dopant induced threshold voltage variation analysis of asymmetric spacer FinFETs,” 2017 International Conference on Trends in Electronics and Informatics (ICEI), Tirunelveli, 2017, pp. 953-956.
doi: 10.1109/ICOEI.2017.8300848
Laboratory Facilities –
- Computer Lab
- Computerize Speech Lab
- VLSI Design Lab
Hardware Facilities –
Servers:
AMD 64 Opteron Based Servers – 03 Nos.
Desktop Computers:
Intel Core i7 processor based – 45 Nos.
Printers: – 03 Nos.
Photocopier Machine:- 1 No.
LCD Projector: – 02 Nos.
Achievements of the School –
- First batches of M.Tech. VLSI Design & Embedded System Design graduated in 2014.
- Selected as participating institute (PI) in C2SD (Chip to system design) project of DeitY, Government of India.
- Established Embedded System Lab in collaboration M/s Free Scale Semiconductors.
Long range/short range goals of School –
Long range goals:
- To trained the PG level and Ph.D. level man power in the area of VLSI Design & Embedded Systems.
- To develop embedded systems applications for agriculture, health & Industrial automations.
- To develop IP cores in the area of VLSI Design.
Short Terms Goals:
- To collaborate with the industries to impart industries relevant educations to the PG students.
- To conduct faculty development programme for the engineering college students.
- To publish research papers and repeated international / national journals.
Postgraduate Courses- M.Tech. Degree Courses
Courses of study were offered in the following specializations (along with seats in each branch):
M.Tech Programme | OP | OBC | SC | ST | OPPWD | OBCPWD | SCPWD | STPWD | Total |
VLSI Design | 14 | 8 | 3 | 4 | 2 | 1 | 0 | 0 | 32 |
Embedded Systems Design | 9 | 5 | 3 | 2 | 1 | 0 | 0 | 0 | 20 |
S. No. | Name of Candidate | Supervisor | Yeas |
1. | Dr. Shubham Tayal | Ashutosh Nandi | 2018 |
- LABORATORIES
Following are the list of labs available in School of VLSI Design & Embedded Systems
VLSI Design Lab.
Embedded System Lab.
A. VLSI Design Lab: | |
1 | EDA/TCAD ToolsCadenceSynopsysMentor GraphicsSynopsys TCAD 2D/3D |
2 | IC Fabrication FacilityProvid ed by SCL Mohali for NIT Kurukshetra |
B. Embedded System Lab: | ||
एल | Microcontroller Boards (Atmel, Freescale, ARM) | |
2 | FPGA Boards | |
|
||
3 | Sensors and Transducers Modules | |
4 | रNational instrumentsmy
|
|
5 | Softwares
|
|
6 | CSL (Computerized Speech Lab-KayPENTAX) |
- REASERCH PROJECTS (ON GOING)
S. No. | Name of scheme and Chief Investigator | Amount sanctioned | Sponsoring Agency | Duration |
1. | SMDP-C2SDProf. R. K. Sharma | 94.09 Lacs | Ministry of Electronics & Information Technology, GOI | 5 years |
- PAPER PUBLISHED IN JOURNAL
Dr. R.K. Sharma
- J. Singh and R. K. Sharma, “Making sleep study instrumentation more unobtrusive,” in IEEE Instrumentation & Measurement Magazine, vol. 21, no. 1, pp. 50-53, February 2018. doi: 10.1109/MIM.2018.8278812
- Vaishali and R. K. Sharma “Delay Line based Phase Frequency Detector” Sensor Letters-American Scientific Publishers, June 2018.
List of Book Chapters:
1. Ria Paul, Rahul Shandilya and R.K. Sharma “Comparative Study and Analysis of Pulse Rate Measurement by Vowel Speech and EVM” accepted in Lecture Notes in Computational Vision and Biomechanics, Springer.
2. Ria Paul, Rahul Shandilya and R. K. Sharma, “Hybrid Design of Real-Time Image Processing Techniques for Multiple Biomedical Applications,” in Ambient Communications and Computer Systems, Springer, 2018, pp. 683-692.
G. PAPER PUBLISHED IN CONFERENCES
Dr. R.K. Sharma
- Jaspal, R.K.Sharma “Resource-Constrained Device for Unobtrusive Estimation of Sleep Stages Using R-R Interval Data presented in in 2018 12th International Symposium on Medical Information and Communication Technology (ISMICT) at University of Technology Sydney, 15 Broadway, Ultimo, NSW 2007 University of Technology Sydney, during 26-28 March 2018
- Ria Paul, Rahul Shandilya and R.K. Sharma “Hybrid Design of Image Processing Techniques for Multiple Biomedical Applications in MATLAB and FPGA” International Conference on Interdisciplinary Research for Sustainable Development (IRSD 2017), held at NITTTR Chandigarh, India, Nov. 2017
- Neha Singhal and Dr. R.K. Sharma, “Design of 4.9 GHz Current starved VCO for PLL and CDR”. In proceedings of 5th International Conference on Signal Processing and Integrated Networks, SPIN-2018 organized by Amity University, Noida, on 22-23 February 2018.
- Kavindra Dwivedi, Dr. R.K. Sharma, Rahul Shandilya “Runtime-Reconfigurable Hybrid Multiplier Design”. In proceedings of International Conference on Electical, Electronics, Computers, Communication, Mechanical and Computing (EECCMC)-2018, organised by Priyadarshini Engineering College, Tamil Nadu, India, during 28th -29th January 2018.
- Heera Vinod, R.K Sharma, “Dysphonic Voice detection using MDVP Parameters”, 2018 IEEE Students’ Conference on Electrical, Electronics and Computer Science.
Dr. Sudhanshu Choudhary
- V Musle and S. Choudhary, “Tuning the optical properties of phosphorene by adsorption of alkali metals and halogens”, Optical and Quantum Electronics 50 (7), 285, 2018
- S Meena and S. Choudhary, “Effects of Functionalization of Carbon Nanotubes on its Spin Transport Properties”, Materials Chemistry and Physics, 2018
- R. Kochar and S. Choudhary, “ MoS2/Phosphorene Heterostructure for Optical Absorption in Visible Region”, IEEE Journal of Quantum Electronics, 2018
- G. Yadav and S. Choudhary, “ Tuning the optical properties of zinc sulfide (ZnS) Nanotube”, IEEE Transactions on Nanotechnology, 2018
- M. Saini and S. Choudhary, “Understanding the Spin Transport in H2O-Adsorbed CNT-Based Magnetic Tunnel Junction”, Journal of Superconductivity and Novel Magnetism, 1-5. 2018
- A. Kumar and S. Choudhary, “Enhanced Magnetoresistance in In-Plane Monolayer MoS2 with CrO2 Electrodes”, Journal of Superconductivity and Novel Magnetism, 1-6, 2018
- M. Singh and S. Choudhary, “Spin Transport Investigations in Bilayer Graphene”, Journal of Superconductivity and Novel Magnetism 31 (1), 75-79, 2018
- S. Meena and S. Choudhary, “Tuning the tunneling magnetoresistance by using fluorinated graphene in graphene based magnetic junctions, “AIP Advances 7 (12), 125008. 2017
- AK Singh, S Choudhary, S Smith, “ Understanding the Effect of Twisting Graphene Sheet on Its Magnetoresistance and Spin Filtration Properties” , Journal of Superconductivity and Novel Magnetism 30 (12), 3497-3501, 2017
- R Mahar, S Choudhary,” Performance evaluation of cross link fully adaptive routing algorithm with cross link architecture for Network on Chip”, Inventive Computing and Informatics (ICICI), International Conference on…, 2017
- J Khichar, S Choudhary, “ Fault aware adaptive routing algorithm for mesh based NoCs”, Inventive Computing and Informatics (ICICI), International Conference on …, 2017
- S. Choudhary, “Spin Transport in H2O Adsorbed SiCNT Based Magnetic Tunnel Junction Using Half Metallic Ferromagnetic Electrodes”, Advanced Science, Engineering and Medicine 9 (11), 943-947, 2017
- S.P. Kumar, P. Sandeep and S. Choudhary, “ Changes in transconductance (gm) and Ion/Ioff with high-K dielectrics in MX2 monolayer 10 nm channel double gate n-MOSFET”, Superlattices and Microstructures 111, 642-648, 2017
- S Meena, S Choudhary, “ Spin transport in carbon nanotubes bundles: An ab-initio study”, Physics Letters A 381 (39), 3431-3439, 2017
- N Patel and S Choudhary, “Current saturation and kink effect in zero bandgap double-gate silicene field effect transistors,” Superlattices and Microstructures 110, 155 161 (Elsevier), 2017
- AK Singh, S Choudhary, “Effect of Twisting and Stretching on Magneto Resistance and Spin Filtration in CNTs,” Magnetochemistry, vol. 3, 2017. doi:10.3390/magnetochemistry3030027, 2017
- G Choudhary, S Choudhary, “First-Principle Study of Effects of Magnesium Oxide Adsorption in SiCNT-Based Magnetic Tunnel Junction”, Journal of Superconductivity and Novel Magnetism 30 (8), 2303-2308, 2017
- S Choudhary, S Harode, C Dhopte, “Understanding the Spin Transport in MgO–HfO2 Bilayer Insulating Barrier Magnetic Tunnel Junction”, Journal of Nanoelectronics and Optoelectronics 12 (7), 661-665, 2017
- R Mahar, S Choudhary, J Khichar, “Design of fully adaptive routing for partially interconnected cross-link mesh topology for Network on Chip”, Intelligent Computing and Control (I2C2), 2017 International Conference on, 1-6, 2017
- J Khichar, S Choudhary, R Mahar,” Fault tolerant dynamic XY-YX routing algorithm for network on-chip architecture”, Intelligent Computing and Control (I2C2), 2017 International Conference on, 1-6, 2017
- S Choudhary, A Chauhan, “First principles study on transport characteristics of SiCNT-based field effect transistor”, International Journal of Electronics Letters 5 (2), 246-254, 2017
- V Kumar, S Choudhary, “Understanding the Spin Transport in MgO Adsorbed Carbon Nanotube Based Magnetic Tunnel Junction”, Advanced Science, Engineering and Medicine 9 (4), 307-310, 2017
- G Saini, S Choudhary, “Improving the subthreshold performance of junctionless transistor using spacer engineering”, Microelectronics Journal 59, 55-58, 2017
- AK Singh, S Choudhary, S Meena,” Study of Effect of Bended Graphene on Its Magnetoresistance and Spin Filtration”, Journal of Superconductivity and Novel Magnetism, 1-6., 2017
- S Meena, S Choudhary, “Enhancing TMR and spin-filtration by using out-of-plane graphene insulating barrier in MTJs”, Physical Chemistry Chemical Physics 19 (27), 17765-17772, 2017
Dr. Gaurav Saini
- Varsha Pathak, Gaurav Saini, “A Graded Channel Dual-Material Gate Junctionless MOSFET for Analog Applications,” Procedia Computer Science, Volume 125, 2018, Pages 825-831, ISSN 1877-0509, https://doi.org/10.1016/j.procs.2017.12.105.
- N. Chahal and G. Saini, “Analog performance investigation of double gate junctionless transistor using spacer layer engineering,” 2017 8th International Conference on Computing, Communication and Networking Technologies (ICCCNT), Delhi, 2017, pp. 1-4.doi: 10.1109/ICCCNT.2017.8204086
- S. Dwivedi and G. Saini, “Effect of random dopant fluctuation in nanoscale junctionless FinFET using low and high-k spacers,” 2017 8th International Conference on Computing, Communication and Networking Technologies (ICCCNT), Delhi, India, 2017, pp. 1-4.
doi:10.1109/ICCCNT.2017.8204094 - S. K. Pandey and G. Saini, “Study of self-heating effects on fully depleted SOI MOSFETs with BOX layer engineering,” 2017 International Conference on Trends in Electronics and Informatics (ICEI), Tirunelveli, 2017, pp. 962-965.
doi: 10.1109/ICOEI.2017.8300850 - N. Gehlawat and G. Saini, “Random dopant induced threshold voltage variation analysis of asymmetric spacer FinFETs,” 2017 International Conference on Trends in Electronics and Informatics (ICEI), Tirunelveli, 2017, pp. 953-956.
doi: 10.1109/ICOEI.2017.8300848
Laboratory Facilities –
- Computer Lab
- Computerize Speech Lab
- VLSI Design Lab
Hardware Facilities –
Servers:
AMD 64 Opteron Based Servers – 03 Nos.
Desktop Computers:
Intel Core i7 processor based – 45 Nos.
Printers: – 03 Nos.
Photocopier Machine:- 1 No.
LCD Projector: – 02 Nos.
Achievements of the School –
- First batches of M.Tech. VLSI Design & Embedded System Design graduated in 2014.
- Selected as participating institute (PI) in C2SD (Chip to system design) project of DeitY, Government of India.
- Established Embedded System Lab in collaboration M/s Free Scale Semiconductors.
Long range/short range goals of School –
Long range goals:
- To trained the PG level and Ph.D. level man power in the area of VLSI Design & Embedded Systems.
- To develop embedded systems applications for agriculture, health & Industrial automations.
- To develop IP cores in the area of VLSI Design.
Short Terms Goals:
- To collaborate with the industries to impart industries relevant educations to the PG students.
- To conduct faculty development programme for the engineering college students.
- To publish research papers and repeated international / national journals.
Postgraduate Courses- M.Tech. Degree Courses
Courses of study were offered in the following specializations (along with seats in each branch):
M.Tech Programme | OP | OBC | SC | ST | OPPWD | OBCPWD | SCPWD | STPWD | Total |
VLSI Design | 14 | 8 | 3 | 4 | 2 | 1 | 0 | 0 | 32 |
Embedded Systems Design | 9 | 5 | 3 | 2 | 1 | 0 | 0 | 0 | 20 |
Coordinator of the School
Prof. Jitender Kumar (NIT Kurukshetra)
Professor, Computer Engineering & Information Technology
- FACULTY MEMBERS
Professors
- Dr. R.K. Sharma, Ph.D. (NIT Kurukshetra)
Assistant Professors
- Mr. Sudhanshu Chaudhary, Ph.D. (IIT Kanpur)
- Mr. Gaurav Saini, Ph.D. (NIT Kurukshetra)
Staff under SMDP-C2SD Project
Lab Engineer
Mr. Rahul Shandilya M.Tech. (NIT Kurukshetra)
- RESEARCH AND DEVELOPMEMNT ACTIVITIES
Ph.D. Programmes
“Low power VLSI design, Embedded System Design Applications, Disease Diagnosis in Human beings using Voice Profiling, Carbon Nanotubes and other Nanostructures, CNTFETs, Graphene FETs, Spintronics, SPINFETs, Magnetic Tunnel Junctions, Microelectronics and VLSI Design, Device modelling, Device circuit co-design in digital/analog domain.”
Ph.D. awarded and in-progress
S. No. | Department | Awarded | In-Progress |
1. | School of VLSI Design and Embedded Systems | 1 (Full Time) | In progress 4 (part time) |
List of Ph.D. awarded
S. No. | Name of Candidate | Supervisor | Yeas |
1. | Dr. Shubham Tayal | Ashutosh Nandi | 2018 |
- LABORATORIES
Following are the list of labs available in School of VLSI Design & Embedded Systems
VLSI Design Lab.
Embedded System Lab.
A. VLSI Design Lab: | |
1 | EDA/TCAD ToolsCadenceSynopsysMentor GraphicsSynopsys TCAD 2D/3D |
2 | IC Fabrication FacilityProvid ed by SCL Mohali for NIT Kurukshetra |
B. Embedded System Lab: | ||
एल | Microcontroller Boards (Atmel, Freescale, ARM) | |
2 | FPGA Boards | |
|
||
3 | Sensors and Transducers Modules | |
4 | रNational instrumentsmy
|
|
5 | Softwares
|
|
6 | CSL (Computerized Speech Lab-KayPENTAX) |
- REASERCH PROJECTS (ON GOING)
S. No. | Name of scheme and Chief Investigator | Amount sanctioned | Sponsoring Agency | Duration |
1. | SMDP-C2SDProf. R. K. Sharma | 94.09 Lacs | Ministry of Electronics & Information Technology, GOI | 5 years |
- PAPER PUBLISHED IN JOURNAL
Dr. R.K. Sharma
- J. Singh and R. K. Sharma, “Making sleep study instrumentation more unobtrusive,” in IEEE Instrumentation & Measurement Magazine, vol. 21, no. 1, pp. 50-53, February 2018. doi: 10.1109/MIM.2018.8278812
- Vaishali and R. K. Sharma “Delay Line based Phase Frequency Detector” Sensor Letters-American Scientific Publishers, June 2018.
List of Book Chapters:
1. Ria Paul, Rahul Shandilya and R.K. Sharma “Comparative Study and Analysis of Pulse Rate Measurement by Vowel Speech and EVM” accepted in Lecture Notes in Computational Vision and Biomechanics, Springer.
2. Ria Paul, Rahul Shandilya and R. K. Sharma, “Hybrid Design of Real-Time Image Processing Techniques for Multiple Biomedical Applications,” in Ambient Communications and Computer Systems, Springer, 2018, pp. 683-692.
G. PAPER PUBLISHED IN CONFERENCES
Dr. R.K. Sharma
- Jaspal, R.K.Sharma “Resource-Constrained Device for Unobtrusive Estimation of Sleep Stages Using R-R Interval Data presented in in 2018 12th International Symposium on Medical Information and Communication Technology (ISMICT) at University of Technology Sydney, 15 Broadway, Ultimo, NSW 2007 University of Technology Sydney, during 26-28 March 2018
- Ria Paul, Rahul Shandilya and R.K. Sharma “Hybrid Design of Image Processing Techniques for Multiple Biomedical Applications in MATLAB and FPGA” International Conference on Interdisciplinary Research for Sustainable Development (IRSD 2017), held at NITTTR Chandigarh, India, Nov. 2017
- Neha Singhal and Dr. R.K. Sharma, “Design of 4.9 GHz Current starved VCO for PLL and CDR”. In proceedings of 5th International Conference on Signal Processing and Integrated Networks, SPIN-2018 organized by Amity University, Noida, on 22-23 February 2018.
- Kavindra Dwivedi, Dr. R.K. Sharma, Rahul Shandilya “Runtime-Reconfigurable Hybrid Multiplier Design”. In proceedings of International Conference on Electical, Electronics, Computers, Communication, Mechanical and Computing (EECCMC)-2018, organised by Priyadarshini Engineering College, Tamil Nadu, India, during 28th -29th January 2018.
- Heera Vinod, R.K Sharma, “Dysphonic Voice detection using MDVP Parameters”, 2018 IEEE Students’ Conference on Electrical, Electronics and Computer Science.
Dr. Sudhanshu Choudhary
- V Musle and S. Choudhary, “Tuning the optical properties of phosphorene by adsorption of alkali metals and halogens”, Optical and Quantum Electronics 50 (7), 285, 2018
- S Meena and S. Choudhary, “Effects of Functionalization of Carbon Nanotubes on its Spin Transport Properties”, Materials Chemistry and Physics, 2018
- R. Kochar and S. Choudhary, “ MoS2/Phosphorene Heterostructure for Optical Absorption in Visible Region”, IEEE Journal of Quantum Electronics, 2018
- G. Yadav and S. Choudhary, “ Tuning the optical properties of zinc sulfide (ZnS) Nanotube”, IEEE Transactions on Nanotechnology, 2018
- M. Saini and S. Choudhary, “Understanding the Spin Transport in H2O-Adsorbed CNT-Based Magnetic Tunnel Junction”, Journal of Superconductivity and Novel Magnetism, 1-5. 2018
- A. Kumar and S. Choudhary, “Enhanced Magnetoresistance in In-Plane Monolayer MoS2 with CrO2 Electrodes”, Journal of Superconductivity and Novel Magnetism, 1-6, 2018
- M. Singh and S. Choudhary, “Spin Transport Investigations in Bilayer Graphene”, Journal of Superconductivity and Novel Magnetism 31 (1), 75-79, 2018
- S. Meena and S. Choudhary, “Tuning the tunneling magnetoresistance by using fluorinated graphene in graphene based magnetic junctions, “AIP Advances 7 (12), 125008. 2017
- AK Singh, S Choudhary, S Smith, “ Understanding the Effect of Twisting Graphene Sheet on Its Magnetoresistance and Spin Filtration Properties” , Journal of Superconductivity and Novel Magnetism 30 (12), 3497-3501, 2017
- R Mahar, S Choudhary,” Performance evaluation of cross link fully adaptive routing algorithm with cross link architecture for Network on Chip”, Inventive Computing and Informatics (ICICI), International Conference on…, 2017
- J Khichar, S Choudhary, “ Fault aware adaptive routing algorithm for mesh based NoCs”, Inventive Computing and Informatics (ICICI), International Conference on …, 2017
- S. Choudhary, “Spin Transport in H2O Adsorbed SiCNT Based Magnetic Tunnel Junction Using Half Metallic Ferromagnetic Electrodes”, Advanced Science, Engineering and Medicine 9 (11), 943-947, 2017
- S.P. Kumar, P. Sandeep and S. Choudhary, “ Changes in transconductance (gm) and Ion/Ioff with high-K dielectrics in MX2 monolayer 10 nm channel double gate n-MOSFET”, Superlattices and Microstructures 111, 642-648, 2017
- S Meena, S Choudhary, “ Spin transport in carbon nanotubes bundles: An ab-initio study”, Physics Letters A 381 (39), 3431-3439, 2017
- N Patel and S Choudhary, “Current saturation and kink effect in zero bandgap double-gate silicene field effect transistors,” Superlattices and Microstructures 110, 155 161 (Elsevier), 2017
- AK Singh, S Choudhary, “Effect of Twisting and Stretching on Magneto Resistance and Spin Filtration in CNTs,” Magnetochemistry, vol. 3, 2017. doi:10.3390/magnetochemistry3030027, 2017
- G Choudhary, S Choudhary, “First-Principle Study of Effects of Magnesium Oxide Adsorption in SiCNT-Based Magnetic Tunnel Junction”, Journal of Superconductivity and Novel Magnetism 30 (8), 2303-2308, 2017
- S Choudhary, S Harode, C Dhopte, “Understanding the Spin Transport in MgO–HfO2 Bilayer Insulating Barrier Magnetic Tunnel Junction”, Journal of Nanoelectronics and Optoelectronics 12 (7), 661-665, 2017
- R Mahar, S Choudhary, J Khichar, “Design of fully adaptive routing for partially interconnected cross-link mesh topology for Network on Chip”, Intelligent Computing and Control (I2C2), 2017 International Conference on, 1-6, 2017
- J Khichar, S Choudhary, R Mahar,” Fault tolerant dynamic XY-YX routing algorithm for network on-chip architecture”, Intelligent Computing and Control (I2C2), 2017 International Conference on, 1-6, 2017
- S Choudhary, A Chauhan, “First principles study on transport characteristics of SiCNT-based field effect transistor”, International Journal of Electronics Letters 5 (2), 246-254, 2017
- V Kumar, S Choudhary, “Understanding the Spin Transport in MgO Adsorbed Carbon Nanotube Based Magnetic Tunnel Junction”, Advanced Science, Engineering and Medicine 9 (4), 307-310, 2017
- G Saini, S Choudhary, “Improving the subthreshold performance of junctionless transistor using spacer engineering”, Microelectronics Journal 59, 55-58, 2017
- AK Singh, S Choudhary, S Meena,” Study of Effect of Bended Graphene on Its Magnetoresistance and Spin Filtration”, Journal of Superconductivity and Novel Magnetism, 1-6., 2017
- S Meena, S Choudhary, “Enhancing TMR and spin-filtration by using out-of-plane graphene insulating barrier in MTJs”, Physical Chemistry Chemical Physics 19 (27), 17765-17772, 2017
Dr. Gaurav Saini
- Varsha Pathak, Gaurav Saini, “A Graded Channel Dual-Material Gate Junctionless MOSFET for Analog Applications,” Procedia Computer Science, Volume 125, 2018, Pages 825-831, ISSN 1877-0509, https://doi.org/10.1016/j.procs.2017.12.105.
- N. Chahal and G. Saini, “Analog performance investigation of double gate junctionless transistor using spacer layer engineering,” 2017 8th International Conference on Computing, Communication and Networking Technologies (ICCCNT), Delhi, 2017, pp. 1-4.doi: 10.1109/ICCCNT.2017.8204086
- S. Dwivedi and G. Saini, “Effect of random dopant fluctuation in nanoscale junctionless FinFET using low and high-k spacers,” 2017 8th International Conference on Computing, Communication and Networking Technologies (ICCCNT), Delhi, India, 2017, pp. 1-4.
doi:10.1109/ICCCNT.2017.8204094 - S. K. Pandey and G. Saini, “Study of self-heating effects on fully depleted SOI MOSFETs with BOX layer engineering,” 2017 International Conference on Trends in Electronics and Informatics (ICEI), Tirunelveli, 2017, pp. 962-965.
doi: 10.1109/ICOEI.2017.8300850 - N. Gehlawat and G. Saini, “Random dopant induced threshold voltage variation analysis of asymmetric spacer FinFETs,” 2017 International Conference on Trends in Electronics and Informatics (ICEI), Tirunelveli, 2017, pp. 953-956.
doi: 10.1109/ICOEI.2017.8300848
Laboratory Facilities –
- Computer Lab
- Computerize Speech Lab
- VLSI Design Lab
Hardware Facilities –
Servers:
AMD 64 Opteron Based Servers – 03 Nos.
Desktop Computers:
Intel Core i7 processor based – 45 Nos.
Printers: – 03 Nos.
Photocopier Machine:- 1 No.
LCD Projector: – 02 Nos.
Achievements of the School –
- First batches of M.Tech. VLSI Design & Embedded System Design graduated in 2014.
- Selected as participating institute (PI) in C2SD (Chip to system design) project of DeitY, Government of India.
- Established Embedded System Lab in collaboration M/s Free Scale Semiconductors.
Long range/short range goals of School –
Long range goals:
- To trained the PG level and Ph.D. level man power in the area of VLSI Design & Embedded Systems.
- To develop embedded systems applications for agriculture, health & Industrial automations.
- To develop IP cores in the area of VLSI Design.
Short Terms Goals:
- To collaborate with the industries to impart industries relevant educations to the PG students.
- To conduct faculty development programme for the engineering college students.
- To publish research papers and repeated international / national journals.
Postgraduate Courses- M.Tech. Degree Courses
Courses of study were offered in the following specializations (along with seats in each branch):
M.Tech Programme | OP | OBC | SC | ST | OPPWD | OBCPWD | SCPWD | STPWD | Total |
VLSI Design | 14 | 8 | 3 | 4 | 2 | 1 | 0 | 0 | 32 |
Embedded Systems Design | 9 | 5 | 3 | 2 | 1 | 0 | 0 | 0 | 20 |